Token generation speed is capped by memory bandwidth, not compute, a DDR3 test shows

A comparison of a 40B model running at 125 tokens per second on a laptop with a 7B model at 1.5 tokens per second on a 2011 CPU, with similar RAM, highlights that common explanations for the gap are often wrong. The author argues that generating each token from a dense model requires reading all weights from memory, so memory bandwidth sets the speed ceiling. Using a read-only benchmark on an old i5-2520M NAS with a single DDR3-1600 DIMM, the author measured about 9.0 GB/s, roughly 70% of theoretical peak. Adding threads plateaued near 10.5 GB/s, indicating the single memory channel is the limit rather than core count. Estimated ceilings and expected real-world speeds for 7B, 13B and 40B models are provided, with swapping identified as a common cause of very slow results.