Shared Memory Tiling Delivers 1.92x Speedup in CUDA Matrix Multiplication Project

A developer documenting their GPU programming learning journey built a matrix multiplication project from scratch using CUDA to apply concepts from studying parallel processor architecture. Starting with a naive implementation that assigned one thread per output element, they identified repeated global memory fetches as a key performance bottleneck. They then implemented a tiled kernel using shared memory, where threads cooperate to load data blocks and reuse them locally, while also adding boundary checks to handle arbitrary matrix dimensions. Benchmarking on a Colab GPU for a 1024×1024 matrix showed latency drop from 4.66 ms to 2.43 ms, translating to a 1.92x speedup and a jump from roughly 460 to 884 GFLOP/s. The project also incorporated a structured GitHub workflow and a dedicated CUDA-event-based benchmark harness to ensure rigorous, reproducible performance measurement.