Rust Developer Builds Real-Time Logic Simulator Handling 100,000+ Gates on Laptop
A software developer has built a high-performance digital logic simulator in Rust capable of processing over 100,000 primitive gates in real-time on standard laptop hardware. The project was inspired by Sebastian Lague's logic simulator videos and aimed to overcome the severe performance limitations common in traditional visual circuit simulators. To eliminate the slowdowns caused by deeply nested chip hierarchies, the developer implemented a flattening compiler that converts recursive gate structures into a single, flat array before simulation begins. Parallel execution is applied dynamically based on workload size, while a lock-free write-back mechanism prevents false sharing without the need for costly mutex locks. A cache defragmentation pass further boosts performance by sorting and repacking gates in topological order, ensuring CPU prefetchers can keep frequently accessed data in L1 cache.
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