Loop reordering beats cache tiling in matrix multiplication benchmark

A developer benchmarked four C implementations of matrix multiplication on Apple Silicon to compare naive, loop-reordered, tiled, and BLAS approaches. The results showed that simply reordering the inner loops (ijk to ikj) delivered a 6.3x speedup over the naive version at n=1024, without any cache-blocking code. Tiling, widely promoted as the go-to optimization, never outperformed the plain reordered loop on this hardware, largely because the CPU's large L2 cache and compiler auto-vectorization already handled memory access efficiently. BLAS remained far ahead at roughly 24.5x faster than the best hand-written loop, indicating its gains come from deeper optimizations beyond cache tiling alone. The key takeaway is that hardware-specific measurement matters, and commonly recommended optimizations do not always deliver the expected gains on every platform.