How Page Tables Translate Virtual to Physical Memory Addresses

Programs use virtual addresses, and the CPU converts each one to a physical address using page tables, which are data structures in memory written by the kernel and read by hardware. On x86-64, a 4096-byte page offset passes through unchanged while the remaining bits index a four-level tree of 512-entry tables, each exactly one page in size. This tree structure avoids wasting memory on empty regions of the address space, since unmapped areas need no lower-level tables. To avoid the cost of up to four memory reads per access, the CPU caches recent translations in the TLB, which the kernel must invalidate when mappings change. Each entry also carries permission and presence bits that the CPU checks on every access, raising a page fault when a check fails.