Fursoy: Open-source out-of-order RV64IMAFDV RISC-V core in SystemVerilog boots Linux 6.6

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A developer has shared Fursoy, a RISC-V processor core written in SystemVerilog that implements the RV64IMAFDV instruction set with out-of-order execution. The project is presented on Hacker News as a Show HN post and links to its GitHub repository. According to the post title, the core is capable of running Linux 6.6. The Hacker News entry had gained 5 points and no comments at the time of the listing.

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