Developer finds core architectural flaw in browser logic simulator while planning new features

A developer building Boolflow, a browser-based logic circuit simulator, discovered a fundamental architectural problem while reviewing the codebase ahead of planned feature work. The simulator computes steady states rather than advancing a true clock, with time emerging only from a JavaScript setInterval that flips a CLOCK node and triggers React re-renders. A deeper issue lies in how stateful components like flip-flops store data in a single module-level Map keyed by node ID, meaning two instances of the same sub-circuit would incorrectly share state. This makes adding sub-circuit support not merely a UI task but a requirement to redesign how node identity is tracked across instances. The developer has chosen a flattening approach — inlining sub-circuit nodes with unique path-based IDs at placement time — to avoid restructuring the simulation engine itself.