Cadence unveils Maestro, a portfolio of chip design AI models for early access in Q4 2026

Cadence has announced Maestro, a set of domain-specialized AI models for chip and system design that combines post-trained language models, trained decision models and agent skills. The portfolio plugs into Cadence's AI Super Agents and EDA tools and can run on Cadence's cloud, public clouds or customer-controlled on-premises systems. Customers can post-train the models on their own designs and workflows, and Cadence's deterministic solvers score outputs against engineering constraints to guide reinforcement learning. The company reports up to 30% better results and up to 5X greater token efficiency versus a general-purpose foundation model, though it has not detailed the benchmarks behind those figures. First models are slated for select early access customers in the fourth quarter of 2026.